The present invention relates to a power converter control loop. More particularly the invention relates to a method of control for electrical power supply units, each unit having a plurality of power converter modules. The method allows precise output voltage regulation to be achieved at the same time as accurately controlling the proportion of load current supplied by the power converter modules connected in parallel.
The method may be implemented in any electrical power converter unit using pulse width modulation (PWM to regulate output voltage or current and is suitable for any application where the outputs of multiple power converter modules are connected in parallel. A PWM signal controls the state of a semiconductor switch, for example, a power transistor, an insulated gate bipolar transistor, a metal-oxide-semiconductor field-effect transistor (MOSFET) or a gate turn-off thyristor.
Voltage feed-forward is a prior art method of PWM regulation for achieving an accurate output voltage. A ramped waveform is fed-forward : through a PWM comparator which in turn controls the width of each PWM pulse. Voltage feed-forward does not, however, permit current sharing of multiple modules.
Parallel connections are desirable for many reasons. Connecting multiple power converter modules in parallel increases the maximum output power beyond that available from a single module, provides redundancy in the event of failure of one or more modules and reduces costs by allowing the use of smaller, standard components.
Current mode control is a prior art method of PWM regulation for achieving accurate current control that enables multiple modules to be connected in parallel within a power converter unit. Current mode power converter units themselves may be set in parallel to one another.
A known drawback of current mode power conversion is the existence of instability when the ratio of PWM xe2x80x98ONxe2x80x99-time to xe2x80x98OFFxe2x80x99-time, the duty cycle, exceeds 50%. The accepted technique for stabilizing current mode control schemes is known as xe2x80x98slope compensationxe2x80x99 in which a compensating voltage signal is summed with a reference voltage signal used to generate the PWM signals. Neverteless, slope compensation reduces open loop voltage accuracy (the voltage accuracy in the absence of feedback) and subsequently closed loop voltage accuracy (the voltage accuracy with feedback).
It is therefore an object of the invention to obviate or at least mitigate the aforementioned problems.
In accordance with the present invention, there is provided an apparatus for applying a pulse width modulated signal to a power supply unit, the apparatus including:
means for providing an input demand signal;
an error amplifier means for generating an error signal in accordance with an input demand signal;
a waveform generator means for generating a ramped voltage waveform;
an oscillator means for providing a clock signal to the ramped voltage waveform generator,
a phase comparator means, for comparing the ramped voltage waveform with the error signal and generating the pulse width modulated signal.
Preferably, the ramped voltage waveform has a current feedback component and a voltage feed-forward component.
Advantageously, the phase comparator means generates the pulse width modulated signal in accordance with the clock signal, the pulse width modulated signal cycling between an xe2x80x98ONxe2x80x99 state and an xe2x80x98OFFxe2x80x99 state.
The onset of each xe2x80x98ONxe2x80x99 state may be arranged to coincide with the onset of each pulse in the clock signal.
The onset of each xe2x80x98OFFxe2x80x99 state is preferably controlled by the result of the comparison between the ramped voltage waveform with the error signal.
The waveform generator means preferably includes a capacitor and a voltage to current converter.
The input demand signal may be modified by a feedback correction signal.
In accordance with a firer aspect of the present invention, there is provided a method for generating a pulse width modulated signal which is regulates both output voltage and output current in a power converter, including the steps of:
a) providing an input demand signal;
b) generating an error signal in accordance with the input demand signal;
c) providing a clock signal;
d) generating a ramped voltage waveform in accordance with the clock signal;
e) comparing the ramped voltage waveform with the error signal; and
f) generating the pulse width modulated signal in accordance with the result of the comparison step e).
The pulse width modulated signal generated in step f) is preferably generated in accordance with the clock signal, the pulse width modulated signal cycling between an xe2x80x98NOxe2x80x99 state and an xe2x80x98OFFxe2x80x99 state.
Step f) may further include arranging the onset of each xe2x80x98NOxe2x80x99 state to coincide with the onset of each pulse in the clock signal.
Advantageously, step f) also includes arranging the onset of each xe2x80x98OFFxe2x80x99 state to be controlled by the result of the comparison step f).
Preferably, step d) includes summing a current feedback component and a voltage feed-forward component
Step b) may Her include modifying the input demand signal in accordance with a feedback correction signal.
The invention is particularly suitable for applications where a power-converter unit supplies highly inductive, capacitive or non-linear loads. The use of a simple error integrator control loop compensates for the phase shifts in tie output to input transfer functions which are inevitable at certain frequencies in a power supply having inductive and capacitive components. Power converters having only resistor loads are simpler to compensate for at higher frequencies since they introduce no phase shift Optimum phase margin and gain margin are thus achieved without the need for, or performance degradation introduced by, additional gain/phase shaping.